According to the Chinese Zodiac, we’ve entered the year of the fire horse, a time traditionally associated with forward momentum, freedom, endurance, and success. Whether you subscribe to the Chinese Zodiac or not, this year is already shaping up to be a momentous one for RISC-V and the OpenHW Foundation. Not only have we welcomed a record number of new members, we’re also looking forward to significant strides in IP, including upcoming open source components from Thales and Ainekko’s CORE-ET.
Community Growth
Our community has grown significantly in the past few months, and I am delighted to welcome nine new members, all of whom work at the cutting-edge of RISC-V research and development:
- University of California Santa Barbara
- Politecnico di Torino
- Siemens
- Openchip & Software Technologies, SL
- Chips-IT
- lowRISC
- Fraunhofer
- Barcelona Supercomputing Center
- Ainekko
This membership boon is real testament to the community’s confidence in the OpenHW Foundation as a vendor-neutral steward and a powerful validation of the technical excellence and industrial relevance of our core IP.
We’re looking forward to working with our members throughout 2026 and beyond to advance RISC-V research, development, and industrial adoption, so that every organisation has complete control over their own tech stack.
IP News
We’ve got some exciting updates and releases in the works from the OpenHW community.
In May we’re looking forward to receiving our copies of “RISC-V System-on-Chip Design, Edition 1”, by David Harris, James Stine, Ph.D., Sarah Harris and Rose Thompson. This textbook is designed for undergraduates interested in learning how to build a complete, 5-stage RISC-V processor.
We’ve collaborated with the great team at Harvey Mudd College for years, and will once again be running a hand-on workshop with the team at the upcoming RISC-V Summit Europe in June. If you haven’t yet, join our community discussions about CORE-V Wally: https://github.com/openhwgroup/cvw/discussions/253
Long-time open source champion and OpenHW member Thales is open-sourcing their CVA6 “Safe” components. This dual-core lock-step core will unlock the potential of the CVA6 in safety-critical environments, including automotive, aerospace, and medical, expanding its usage far beyond typical industrial grade applications.
Meanwhile, new members Ainekko are bringing their CORE-ET to the OpenHW Foundation – a 16nm open source, soon to be taped-out, RISC-V many-core AI inference architecture and platform with efficient memory and tooling for edge AI systems.
Accelerating EU Digital Autonomy
The OpenHW Foundation aims to make open source RISC-V cores the global standard. Through sustained collaboration with the European Union’s Horizon Europe programme projects TRISTAN, Rigoletto, and WISE4 we are advancing and industrialising RISC-V IP to support European competitiveness, autonomy, and sustainability in the global market.
As part of TRISTAN, in January we launched the European Unified RISC-V IP Access Platform. Hosted by OpenHW, this platform collects and integrates open source IPs from TRISTAN and other Chips JU projects (including ISOLDE and RIGOLETTO), enabling any interested party to benefit from verified, industry-ready RISC-V projects. This is the first comprehensive collection of any EU RISC-V artifacts, and marks a pivotal milestone in European technology sovereignty. Finding an open source RISC-V artifact that fits your challenge has become not just feasible, but achievable.
Get Involved
There are so many ways for you to get involved with the OpenHW community, and benefit from ongoing research, development and advancements in the RISC-V ecosystem.
Join us at one of our upcoming events:
- Elektor – RISC-V – Open Architecture for Embedded, AI, and Automotive: April 15, Online, Global
- RISC-V Summit Europe: June 8 - 12 Bologna, Italy
Follow us on LinkedIn, browse our IP and join our multiple discussion threads on GitHub.
